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11.6.4.3
DTTI Pin Control Operation
You can control RTO0 to RTO5 output by means of the DTTI pins by setting "1" in the
waveform control register 1 (SIGCR1) DTIE: bit7. When a DTTI pin "L" level is detected,
RTO0 to RTO5 output is locked at non-operating level, until the interrupt flag (SIGCR
register DTIF: bit6) is cleared. When RTO0 to RTO5 is at non-operating level, these pins
can be set via software using the port data registers (PDR), which share them.
Additionally, if they are used as input ports using the data direction register (DDR), Hi-Z
is outputted.
■ DTTI Pin Input Operation
Even when "L" is detected in DTTI pin input, although the timer continues to operate while the waveform
generator is operational, waveforms are not outputted to the external RTO0 to RTO5 pins.
<Register setting>
TCDTH, TCDTL
TCCSH, TCCSL
OCSH0 to OCSH5, OCSL0 to OCSL5
PDRx
TMRRH0 to TMRRH2, TMRRL0 to TMRRL2 : XXXX
SIGCR1
Note: Be sure to set according to "X" operation.
16-bit free-run timer
Count value
FFFF
H
BFFF
H
7FFF
H
3FFF
H
0000
H
Compare
register 0
Compare
register 1
RT1
RTO0
RTO1
DTTI0
DTIF
Figure 11.6-28 Operation when DTTI Input Is Enabled
: XXXX
H
: XXXXXXXX X0X0XXXX
: -XX1XXXX XXXXXX11
: XXXXXX00
(Setting of non-operating level)
B
(Setting of non-overlap timing)
H
: 1XXXXXXX
(Setting of DTTI input and 16-bit dead timer count clock)
B
BFFF
H
3FFF
H
Output non-operating
CHAPTER 11 MULTIFUNCTIONAL TIMER
CPCLRH, CPCLRL
OCCPH0 to OCCPH5, OCCPL0 to OCCPL5 : XXXX
B
DTCR0 to DTCR2
B
Software reset
: XXXX
(Setting of cycle)
H
(Compare value)
H
: 0XXXX100
B
Time
289
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