Fujitsu MB91260B Series Hardware Manual page 150

32-bit microcontroller
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■ External Interrupt Request Level
1. If the request level is an edge request, a pulse width of at least three machine cycles (peripheral clock
machine cycles) is required to detect an edge.
2. If the request input level is a level setting, a request input is entered from outside and is then cancelled,
the request to the interrupt controller remains active because a source holding circuit exists internally.
The external interrupt source register must be cleared to cancel a request to the interrupt controller.
Figure 6.3-2 Clearing the External Interrupt Source Register when a Level is Set
Interrupt Input
Figure 6.3-3 Interrupt Source and Interrupt Request to Interrupt Controller when Interrupts are Enabled
Interrupt input
Interrupt request
to interrupt controller
CHAPTER 6 EXTERNAL INTERRUPT AND NMI CONTROLLER
External interrupt source register
Level
detection
(Source holding circuit)
Holds a source unless it is cleared
"H" level
Becomes inactive when the external interrupt source register is cleared
Interrupt controller
Enable gate
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