Register Of Pwc - Fujitsu MB91260B Series Hardware Manual

CHAPTER 10 PWC (Pulse Width Count: Pulse Width Measurement)
10.3

Register of PWC

This section describes the PWC registers.
■ PWCSR Register (PWC Control/Status Register)
PWCSR0/PWCSR1 (Upper)
ch0:0000E0
ch1:0000E4
PWCSR0/PWCSR1 (Lower)
ch0:0000E1
ch1:0000E5
[bit15] STRT: Counter start bit
[bit14] STOP: Counter stop bit
The bits start/restart/stop the 16-bit up counter, and indicate the counter operation status at reading. The
following shows the bit functions.
1. Function at writing (operation control)
STRT
0
0
1
1
*:The clear bit instruction is usable.
2. Function at reading (operating status indication)
STRT
0
1
• Initialized to "00
• The read / write is possible. However, there are different meanings in writing and in reading as shown
above.
186
Bit15 Bit14
STRT STOP
H
H
Read/Write →
R/W R/W
Initial value →
(0)
Bit7 Bit6
CKS1 CKS0
H
H
Read/Write →
R/W R/W
Initial value →
(0)
STOP
0 The influence is not in the function / the operation.
1 Start/restart a counter (counter enable) *
0 Stop a counter operation forcibly (disable count) *
1 The influence is not in the function / the operation.
STOP
0 Count stopped (not started or measurement completed) [Initial value]
1 Count operating (measuring)
" when resetting.
B
Bit13 Bit12 Bit11
EDIR EDIE OVIR
R R/W
(0) (0) (0)
Bit5 Bit4
PIS1 PIS0
R/W R/W
(0) (0) (0)
Operation Control Functions
Display of Operation Status
Bit10 Bit9
OVIE ERR
R/W R/W R
(0) (0) (0)
Bit3 Bit2 Bit1
SC MOD2 MOD1
R/W R/W R/W
(0) (0) (0)
Bit8
-
-
(0)
Bit0
MOD0
R/W
(0)