Fujitsu MB91260B Series Hardware Manual page 250

Table 11.4-6 Compare Mode Control Register (OCMOD)
Bit Name
bit15,
Unused bit
bit14
MOD15:
bit13 ch5 compare match output
setting bit
MOD14:
bit12 ch4 compare match output
setting bit
MOD13:
bit11 ch3 compare match output
setting bit
MOD12:
bit10 ch2 compare match output
setting bit
MOD11:
bit9 ch1 compare match output
setting bit
MOD10:
bit8 ch0 compare match output
setting bit
• The read value is indeterminate.
• Writing to these bits have no effect on the operation.
• This bit specifies the operation when the compare match of the output compare
output occurs.
• The initial value is "0"
• When the bit is set to "0", reverse the output value temporarily when the match
occurs.
• When the bit is set to "1", set the output value to "1" or reset the output value
to "0" when the match occurs. CMOD bit of the compare control register
(OCSH) sets the set/reset switch.
• Before data is written, be sure to stop the compare operation.
• CMOD is set for ch0 and ch1, ch2 and ch3, ch4 and ch5.
- Reset/Set is not available to ch0 and ch1 separately.
- Reset/Set is not available to ch2 and ch3 separately.
- Reset/Set is not available to ch4 and ch5 separately.
CHAPTER 11 MULTIFUNCTIONAL TIMER
Function
235