Fujitsu MB91260B Series Hardware Manual page 360

■ Operation of Pause-conversion Mode
In the stop conversion mode, the analog input set by the ANS and ANE bits is converted by being
suspended for every channel, the analog input set by the ANS bit is resumed at the end of conversion of the
end channel set by the ANE bit, and the operation of A/D conversion and suspension is continued. If the
start channel and end channel are identical (ANS=ANE), conversion loops on the channel specified by the
ANS bits only. When the conversion is restarted during the suspension, the start factor specified by the
STS1 and 0 bits is generated. The settings in Figure 14.6-3 are required in order to operate in stop
conversion mode.
bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 bit7 bit6
ADCH/
- -
ADMD
ADCS
BUSY INT
ADCD - -
AICR
References:
The example of conversion order in stop conversion mode is shown in following.
• When ANS=000
AN0 → Pause → AN1 → Pause → AN2 → Pause → AN0 → Repeat
• When ANS=110
AN6 → Pause → AN7 → Pause → AN0 → Pause → AN1 → Pause → AN6 → Repeat
• When ANS=011
AN3 → Pause → AN3 → Pause → Repeat
Notes:
• A/D unit 1 uses the 2 channels AN8 and AN9, and A/D unit 2 uses the 2 channels AN10 and
AN11.
• Always write 0 to ANE1, ANE2, ANS2, and ANS1 of A/D units 1 and 2.
• Be sure to set A/D units 1 and 2 so that ANS0 is less than or equal to ANE0.
Figure 14.6-3 Setting at Pause-conversion Mode
ANS2 ANS1 ANS0 ANE2 ANE1 ANE0 MD1
INTE PAUS S10 -
START
- - - -
and ANE=011
B B
and ANE=001
B B
, ANE=011 :
B B
CHAPTER 14 8/10-BIT A/D CONVERTER
bit5 bit4 bit3 bit2
MD0 STS1 STS0 CT1
1 1
Reser-
ved
0
Store the converting data
0: Set "0".
1: Set "1".
:
:
bit1 bit0
CT0 ST1 ST0
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