Ahb Related Signals; Table A-1 Ahb Related Signals - ARM ARM926EJ-S Technical Reference Manual

A.2

AHB related signals

ARM DDI0198D
Table A-1 describes the ARM926EJ-S processor AHB related signals.
Signal name Direction
DHADDR[31:0] Output
DHBL[3:0] Output
DHBURST[2:0] Output
DHBUSREQ Output
DHCLKEN Input
DHGRANT Input
DHLOCK Output
DHPROT[3:0] Output
DHRDATA[31:0] Input
DHREADY Input
DHRESP[1:0] Input
DHSIZE[2:0] Output
DHTRANS[1:0] Output
DHWDATA[31:0] Output
DHWRITE Output
HRESETn Input
IHADDR[31:0] Output
IHBURST[2:0] Output
IHBUSREQ Output
IHCLKEN Input
Copyright © 2001-2003 ARM Limited. All rights reserved.

Table A-1 AHB related signals

Description
AHB address (data).
Byte lane indicator for current transfer.
AHB burst size (data).
AHB bus request (data).
Signifies the rising edge of HCLK for the data AHB. If
CLK and HCLK are the same frequency, DHCLKEN
must be tied HIGH.
AHB bus grant signal (data).
AHB bus lock signal (data).
AHB bus access information (data).
AHB read data (data).
AHB transfer complete signal (data).
AHB transfer response (data).
AHB transfer size (data), indicating byte, halfword, or
word. DHSIZE[2] is tied LOW.
AHB transfer type (data).
AHB write data (data).
AHB transfer direction (data).
AHB reset signal.
AHB address (instruction).
AHB burst size. (instruction).
AHB bus request (instruction).
Signifies the rising edge of HCLK for the data AHB. If
CLK and HCLK are the same frequency, IHCLKEN
must be tied HIGH.
Signal Descriptions
A-3