ARM ARM926EJ-S Technical Reference Manual page 246

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Index
Cleaning DCache 9-3
Clock gating 5-32
Coarse page table descriptor 3-11
Context ID register 2-35
Control register 2-12
Conventions
numerical xx
signal naming xix
timing diagram xviii
typographical xviii
Coprocessor
clocking 8-2
instructions 8-3
interface 8-2
interface signals A-5
CPABORT 8-12
CPBURST 8-11
CPU aborts 3-21
CP15
accessing registers 2-4
MRC and MCR bit pattern 2-4
registers 2-3
test registers B-2
Ctype
encoding 2-9
field 2-9
D
DCache
enable/disable 2-14
size 2-9
Debug
clocks 11-2
override register B-2
signals A-7
support 11-2
Debug/test address register B-4
Descriptor
coarse page table 3-11
fine page table 3-12
level one 3-8
level two 3-14
section 3-10
Index-2
Domain 3-3
access control 3-24
access control register 2-17, 3-24
fault 3-27
field 2-19
Drain write buffer 2-21, 9-3
Dsize
field 2-9
format 2-9
DTCM
disabling 5-19
enabling 5-19
E
Embedded trace macrocell 10-2
Enable bit (TCM) 2-30
Endianness 6-6
ETM 10-2
interface signals A-12
Exception vectors 2-14
External aborts 3-29
F
FAR 2-20
Fast context switch 2-34
Fast context switch extension (FCSE)
2-34
Fault
alignment 3-27
checking sequence 3-26
domain 3-27
permission 3-28
Fault address register 2-20, 3-21
Fault status register 2-18, 3-21
FCSE PID register 2-34
FIFOFULL 10-2
Fine page table descriptor 3-12
Format, cache way and set way 4-9
FSR 2-18
status field encoding 2-20
H
Halfword accesses 6-6
Copyright © 2001-2003 ARM Limited. All rights reserved.
I
I and M bit settings
DCache 4-6
ICache 4-5
I bit 2-14
ICache
enable/disable 2-14
size 2-9
ID cache type register 2-7
ID code register 2-7, 2-8
IMB 9-2
example sequences 9-5
operation 9-3
Instruction memory barrier 9-2
Instructions
MCR 2-4
MRC 2-4
Interlocked MCR 8-7
Interrupts 8-10
Invalidate
cache 2-21
data TLB 2-25
data TLB single entry 2-25
ICache 9-4
instruction TLB 2-25
single entry 2-21
TLB 2-25
TLB single entry 2-25
Isize field 2-9
Isize format 2-9
ITCM
disabling 5-19
enabling 5-19
J
JTAG signals A-9
L
L bit 2-28
Large page references, translating 3-16
LDC/STC instructions 8-4
Leakage control 12-3
Len field 2-10
ARM DDI0198D

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