ARM ARM926EJ-S Technical Reference Manual page 231

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Context
Control bits
Coprocessor
Copy back
Core
Core module
Core reset
CPI
CPSR
CRF
Current Program Status Register (CPSR)
Cycles Per instruction (CPI)
ARM DDI0198D
CAM includes comparison logic with each bit of storage. A data value is broadcast to
all words of storage and compared with the values there. Words that match are flagged
in some way. Subsequent operations can then work on flagged words. It is possible to
read the flagged words out one at a time or write to certain bit positions in all of them.
The environment that each process operates in for a multitasking operating system. In
ARM processors, this is limited to mean the Physical Address range that it can access
in memory and the associated memory access permissions.
See also Fast context switch.
The bottom eight bits of a Program Status Register (PSR). The control bits change when
an exception arises and can be altered by software only when the processor is in a
privileged mode.
A processor that supplements the main processor. It carries out additional functions that
the main processor cannot perform. Usually used for floating-point math calculations,
signal processing, or memory management.
See Write-back.
A core is that part of a processor that contains the ALU, the datapath, the
general-purpose registers, the Program Counter, and the instruction decode and control
circuitry.
In the context of an ARM Integrator, a core module is an add-on development board that
contains an ARM processor and local memory. Core modules can run standalone, or can
be stacked onto Integrator motherboards.
See Warm reset.
See Cycles per instruction.
See Current Program Status Register
See Condensed Reference Format.
The register that holds the current operating processor status.
Cycles per instruction (or clocks per instruction) is a measure of the number of
computer instructions that can be performed in one clock cycle. This figure of merit can
be used to compare the performance of different CPUs against each other. The lower the
value, the better the performance.
Copyright © 2001-2003 ARM Limited. All rights reserved.
Glossary
Glossary-7

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