ARM ARM926EJ-S Technical Reference Manual page 225

Glossary
Abort
Abort model
Access permission
Addressing modes
ARM DDI0198D
This glossary describes some of the terms used in this manual. Where terms can have
several meanings, the meaning presented here is intended.
A mechanism that indicates to a core that it must halt execution of an attempted illegal
memory access. An abort can be caused by the external or internal memory system as a
result of attempting to access invalid instruction or data memory. An abort is classified
as either a Prefetch or Data Abort, and an internal or External Abort.
See also Data Abort, External Abort and Prefetch Abort.
An abort model is the defined behavior of an ARM processor in response to a Data
Abort exception. Different abort models behave differently with regard to load and store
instructions that specify base register write-back.
The mechanism that controls if a task or process is allowed to access sections or pages
of memory. If an access is attempted to an area of memory without the required
permissions, a permission fault is raised.
A mechanism, shared by many different instructions, for generating values used by the
instructions. For four of the ARM addressing modes, the values generated are memory
addresses (which is the traditional role of an addressing mode). A fifth addressing mode
generates values to be used as operands by data-processing instructions.
Copyright © 2001-2003 ARM Limited. All rights reserved. Glossary-1