ARM ARM926EJ-S Technical Reference Manual page 81

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31
Translation base
31
Translation base
31
Coarse page table base address
31
Coarse page table base address
31
Page base address
31
Page base address
ARM DDI0198D
31
Translation table base
14 13
14 13
First-level descriptor
Second-level descriptor
16 15
12 11 10 9 8 7 6 5 4 3 2 1 0
AP3 AP2 AP1 AP0 C B 0 1
Physical address
16 15
Figure 3-10 Large page translation from a coarse page table
Because the upper four bits of the page index and low-order four bits of the coarse page
table index overlap, each coarse page table entry for a large page must be duplicated 16
times (in consecutive memory locations) in the coarse page table.
If a large page descriptor is included in a fine page table, the high-order six bits of the
page index and low-order six bits of the fine page table index overlap. Each fine page
table entry for a large page must therefore be duplicated 64 times.
Copyright © 2001-2003 ARM Limited. All rights reserved.
Modified virtual address
20 19
L2
Table index
table index
0
2 1 0
Table index
0 0
10 9 8
5 4 3 2 1 0
Domain
1
0 1
10 9
2 1 0
L2 table index
0 0
0
Page index
Memory Management Unit
16 15
12 11
Page index
0
3-17

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