ARM ARM926EJ-S Technical Reference Manual page 103

ARM DDI0198D
Table 4-4 Page table C and B bit settings for the DCache (continued)
Page Page
table table Description
C bit B bit
1 1 Write-back
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ARM926EJ-S behavior
DCache enabled:
Read hit Read from DCache
Read miss Linefill
Write hit Write to the DCache only
Write miss Buffered store to external memory.
Caches and Write Buffer
4-7