Table B-12 Encoding Of The Memory Region Remap Register; Table B-13 Encoding Of The Remap Fields - ARM ARM926EJ-S Technical Reference Manual

CP15 Test and Debug Registers
Bit Name
[31:16] -
[15:14] IWB
[13:12] IWT
[11:10] INCB
[9:8] INCNB
[7:6] DWB
[5:4] DWT
[3:2] DNCB
[1:0] DNCNB
B-16
Table B-12 describes the bit fields of the Memory Region Remap Register.

Table B-12 Encoding of the Memory Region Remap Register

Definition
Should Be Zero
Remap select bits for instruction-side write-back region
Remap select bits for instruction-side write-through region
Remap select bits for instruction-side noncachable bufferable region
Remap select bits for instruction-side noncachable nonbufferable region
Remap select bits for data-side write-back region
Remap select bits for data-side write-through region
Remap select bits for data-side noncachable bufferable region
Remap select bits for data-side noncachable nonbufferable region
Table B-13 shows the encoding of each of the remap fields.
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Table B-13 Encoding of the remap fields

Remap field
b00 = noncachable nonbufferable
b01 = noncachable bufferable
b10 = write-through
b11 = write-back
Reset state
0x0000
b11
b10
b01
b00
b11
b10
b01
b00
ARM DDI0198D