Fault Checking Sequence; Figure 3-13 Sequence For Checking Faults - ARM ARM926EJ-S Technical Reference Manual

Memory Management Unit
3.5

Fault checking sequence

Section
translation
fault
Section
domain
fault
Section
permission
fault
3-26
The sequence the MMU uses to check for access faults is different for sections and
pages. The sequence for both types of access is shown in Figure 3-13.
Invalid
Section
No access (00)
Reserved (10)
Section
Client (01)
Check
Violation access
permissions
The conditions that generate each of the faults are described in:
• Alignment faults on page 3-27
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Modified virtual address
Check address alignment
Get first-level descriptor
Page
Get page
table entry
Check domain status
Page
Client (01)
Manager
(11)
Check
access
permissions
Physical address

Figure 3-13 Sequence for checking faults

Alignment
Misaligned
fault
Page
Invalid translation
fault
Page
No access (00)
domain
Reserved (10)
fault
Page
Violation permission
fault
ARM DDI0198D