Figure 5-18 Tcm Subsystem That Uses The Dma Interface - ARM ARM926EJ-S Technical Reference Manual

5.5.6 Integrating RAM test logic
ARM DDI0198D
The memory used to implement TCM might require some form of test access, typically
by a BIST controller. Generally this is done by adding a collar of multiplexors around
the memory inputs. However, this method will add undesirable delays to the chip select
and address signals. This can be avoided by using the DMA interface to perform the
multiplexing of address and chip-select values. This is shown in Figure 5-19 on
page 5-28.
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ARM926EJ-S
DRDMAADDR[17:0]
DRDMAEN
DRDMACS
DRRD[31:0]
DRWBL[3:0]
DRnRW
DRWD[31:0]
DRADDR[17:0]
DRCS
DRWAIT
DRSEQ

Figure 5-18 TCM subsystem that uses the DMA interface

Tightly-Coupled Memory Interface
DMA
DMAADDR[31:0]
DRDMAEN
DMAWD[31:0]
DMAnRW
DMAWBL[3:0]
DMARD[31:0]
RD[31:0]
1
WBL[3:0]
0
1
nRW
0
1
WD[31:0]
0
A[17:0]
CS
SRAM
5-27