Dctl-Device Control Register - Intel 2ND GENERATION CORE PROCESSOR FAMILY DESKTOP - DATASHEET VOLUME 2 01-2011 Datasheet

Processor Configuration Registers
2.10.36 DCTL—Device Control Register
This register provides control for PCI Express device specific capabilities.
The error reporting enable bits are in reference to errors detected by this device, not
error messages received across the link. The reporting of error messages (ERR_CORR,
ERR_NONFATAL, ERR_FATAL) received by Root Port is controlled exclusively by Root
Port Command Register.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
Size:
BIOS Optimal Default
Bit
15:15
14:12
11
10:8
7:5
4
3
2
1
0
Datasheet, Volume 2
0/6/0/PCI
A8–A9h
0000h
RO, RW
16 bits
0h
Reset RST/
Attr
Value PWR
RO 0h
RO 000b Uncore
RO 0b Uncore
RO 0h
RW 000b Uncore
RO 0b Uncore
RW 0b Uncore
RW 0b Uncore
RW 0b Uncore
RW 0b Uncore
Description
Reserved
Reserved for Max Read Request Size (MRRS)
Reserved for Enable No Snoop (NSE)
Reserved
Max Payload Size
000 = 128B maximum payload for Transaction Layer Packets (TLP)
All other encodings are reserved.
As a receiver, the device must handle TLPs as larger as the value set
in this field. As a transmitter, the device must not generate TLPs
exceeding the value set in this field.
Reserved for Enable Relaxed Ordering (ROE)
Unsupported Request Reporting Enable (URRE)
When set, this bit allows signaling ERR_NONFATAL, ERR_FATAL, or
ERR_CORR to the Root Control register when detecting an
unmasked Unsupported Request (UR). An ERR_CORR is signaled
when an unmasked Advisory Non-Fatal UR is received. An
ERR_FATAL or ERR_NONFATAL is sent to the Root Control register
when an uncorrectable non-Advisory UR is received with the severity
bit set in the Uncorrectable Error Severity register.
Fatal Error Reporting Enable (FERE)
When set, this bit enables signaling of ERR_FATAL to the Root
Control register due to internally detected errors or error messages
received across the link. Other bits also control the full scope of
related error reporting.
Non-Fatal Error Reporting Enable (NERE)
When set, this bit enables signaling of ERR_NONFATAL to the Rool
Control register due to internally detected errors or error messages
received across the link. Other bits also control the full scope of
related error reporting.
Correctable Error Reporting Enable (CERE)
When set, this bit enables signaling of ERR_CORR to the Root
Control register due to internally detected errors or error messages
received across the link. Other bits also control the full scope of
related error reporting.
169