Tom-Top Of Memory Register - Intel 2ND GENERATION CORE PROCESSOR FAMILY DESKTOP - DATASHEET VOLUME 2 01-2011 Datasheet

Processor Configuration Registers
2.5.26 TOM—Top of Memory Register
This register contains the size of physical memory. BIOS determines the memory size
reported to the OS using this register.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
Size:
BIOS Optimal Default
Bit
63:39
38:20
19:1
0
Datasheet, Volume 2
0/0/0/PCI
A0–A7h
0000007FFFF00000h
RW-KL, RW-L
64 bits
00000000000h
Reset RST/
Attr
Value PWR
RO 0h
RW-L 7FFFFh Uncore
RO 0h
RW-KL 0b Uncore
Description
Reserved
Top of Memory (TOM)
This register reflects the total amount of populated physical
memory. This is NOT necessarily the highest main memory address
(holes may exist in main memory address map due to addresses
allocated for memory mapped IO). These bits correspond to
address bits 38:20 (1 MB granularity). Bits 19:0 are assumed to be
0. All the bits in this register are locked in Intel TXT mode.
Reserved
Lock (LOCK)
This bit will lock all writeable settings in this register, including
itself.
75