Intrline6-Interrupt Line Register; Intrpin6-Interrupt Pin Register - Intel 2ND GENERATION CORE PROCESSOR FAMILY DESKTOP - DATASHEET VOLUME 2 01-2011 Datasheet

Processor Configuration Registers
2.10.22 INTRLINE6—Interrupt Line Register
This register contains interrupt line routing information. The device itself does not use
this value, rather it is used by device drivers and operating systems to determine
priority and vector information.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
Size:
Bit
7:0
2.10.23 INTRPIN6—Interrupt Pin Register
This register specifies which interrupt pin this device uses.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
Size:
Bit
7:3
2:0
Datasheet, Volume 2
0/6/0/PCI
3Ch
00h
RW
8 bits
Reset RST/
Attr
Value PWR
RW 00h Uncore
0/6/0/PCI
3Dh
01h
RW-O, RO
8 bits
Reset RST/
Attr
Value PWR
RO 00h Uncore
RW-O 1h Uncore
Description
Interrupt Connection (INTCON)
This field is used to communicate interrupt line routing
information.
BIOS Requirement: POST software writes the routing information
into this register as it initializes and configures the system. The
value indicates to which input of the system interrupt controller
this device's interrupt pin is connected.
Description
Interrupt Pin High (INTPINH)
Interrupt Pin (INTPIN)
As a multifunction device, the PCI Express device may specify any
INTx (x=A,B,C,D) as its interrupt pin.
The Interrupt Pin register indicates which interrupt pin the device
(or device function) uses.
1h = Corresponds to INTA# (Default)
2h = Corresponds to INTB#
3h = Corresponds to INTC#
4h = Corresponds to INTD#
Devices (or device functions) that do not use an interrupt pin must
put a 0 in this register.
The values 05h through FFh are reserved.
This register is write once. BIOS must set this register to select the
INTx to be used by this root port.
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