Pam1-Programmable Attribute Map 1 Register - Intel 2ND GENERATION CORE PROCESSOR FAMILY DESKTOP - DATASHEET VOLUME 2 01-2011 Datasheet

2.5.17 PAM1—Programmable Attribute Map 1 Register
This register controls the read, write and shadowing attributes of the BIOS range from
C_0000h to C_7FFFh. The Uncore allows programmable memory attributes on 13
legacy memory segments of various sizes in the 768KB to 1MB address range. Seven
Programmable Attribute Map (PAM) registers are used to support these features.
Cacheability of these areas is controlled using the MTRR register in the core.
Two bits are used to specify memory attributes for each memory segment. These bits
apply to host accesses to the PAM areas. These attributes are:
• RE – Read Enable. When RE=1, the host read accesses to the corresponding
memory segment are claimed by the Uncore and directed to main memory.
Conversely, when RE=0, the host read accesses are directed to DMI.
• WE – Write Enable. When WE=1, the host write accesses to the corresponding
memory segment are claimed by the Uncore and directed to main memory.
Conversely, when WE=0, the host read accesses are directed to DMI.
The RE and WE attributes permit a memory segment to be Read Only, Write Only,
Read/Write or Disabled. For example, if a memory segment has RE=1 and WE=0, the
segment is Read Only.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
Size:
BIOS Optimal Default
Bit
7:6
5:4
3:2
1:0
64
0/0/0/PCI
81h
00h
RW
8 bits
0h
Reset RST/
Attr
Value PWR
RO 0h
RW 00b Uncore
RO 0h
RW 00b Uncore
Processor Configuration Registers
Description
Reserved
0C4000–0C7FFF Attribute (HIENABLE)
This field controls the steering of read and write cycles that
address the BIOS area from 0C_4000h to 0C_7FFFh.
00 = DRAM Disabled. All accesses are directed to DMI.
01 = Read Only. All reads are sent to DRAM, all writes are
forwarded to DMI.
10 = Write Only. All writes are sent to DRAM, all reads are serviced
by DMI.
11 = Normal DRAM Operation. All reads and writes are serviced by
DRAM.
This register is locked by Intel TXT.
Reserved
0C0000–0C3FFF Attribute (LOENABLE)
This field controls the steering of read and write cycles that
address the BIOS area from 0C0000h to 0C3FFFh.
00 = DRAM Disabled. All accesses are directed to DMI.
01 = Read Only. All reads are sent to DRAM. All writes are
forwarded to DMI.
10 = Write Only. All writes are sent to DRAM. All reads are serviced
by DMI.
11 = Normal DRAM Operation. All reads and writes are serviced by
DRAM.
This register is locked by Intel TXT.
Datasheet, Volume 2