Intel 2ND GENERATION CORE PROCESSOR FAMILY DESKTOP - DATASHEET VOLUME 2 01-2011 Datasheet page 83

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Processor Configuration Registers
Table 2-8.
PCI Device 1, Function 0–2 Configuration Register Address Map (Sheet 2 of 2)
Address
Offset
92–93h
94–97h
98–99h
9A–9Fh
A0–A1h
A2–A3h
A4–A7h
A8–A9h
AA–ABh
AC–AFh
B0–B1h
B2–B3h
B4–B7h
B8–B9h
BA–BBh
BC–BDh
BE–C3h
C4–C7h
C8–C9h
CA–CFh
D0–D1h
D2–D3h
Datasheet, Volume 2
Register
Symbol
MC
Message Control
MA
Message Address
MD
Message Data
RSVD
Reserved
PEG_CAPL
PCI Express-G Capability List
PEG_CAP
PCI Express-G Capabilities
DCAP
Device Capabilities
DCTL
Device Control
DSTS
Device Status
RSVD
Reserved
Link Control
LCTL
Link Status
LSTS
SLOTCAP
Slot Capabilities
SLOTCTL
Slot Control
Slot Status
SLOTSTS
RCTL
Root Control
RSVD
Reserved
RSVD
Reserved
RSVD
Reserved
RSVD
Reserved
Link Control 2
LCTL2
RSVD
Reserved
Register Name
Reset
Access
Value
0000h
RO, RW
00000000h
RW, RO
0000h
RW
0h
RO
0010h
RO
0142h
RO, RW-O
00008000h
RO, RW-O
0000h
RO, RW
0000h
RW1C, RO
0h
RO
RW, RO,
0000h
RW-V
RO-V,
1001h
RW1C, RO
00040000h
RW-O, RO
0000h
RO
RO, RO-V,
0000h
RW1C
0000h
RO, RW
0h
RO
00000800h
RO, RW-O
0000h
RW-V, RW
0h
RO
RWS,
0002h
RWS-V
0000h
RO-V
83

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