Gmadr-Graphics Memory Range Address Register - Intel 2ND GENERATION CORE PROCESSOR FAMILY DESKTOP - DATASHEET VOLUME 2 01-2011 Datasheet

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Processor Configuration Registers
2.8.11
GMADR—Graphics Memory Range Address Register
GMADR is the PCI aperture used by software to access tiled GFX surfaces in a linear
fashion.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
Size:
Bit
63:39
38:29
28
27
26:4
3
2:1
0
Datasheet, Volume 2
0/2/0/PCI
18–1Fh
000000000000000Ch
RO, RW-L, RW
64 bits
Reset
RST/
Attr
Value
PWR
FLR,
RW
0000000h
Uncore
00000000
FLR,
RW
00b
Uncore
FLR,
RW-L
0b
Uncore
FLR,
RW-L
0b
Uncore
RO
000000h
Uncore
RO
1b
Uncore
RO
10b
Uncore
RO
0b
Uncore
Description
Reserved for Memory Base Address (RSVDRW)
Must be set to 0 since addressing above 512 GB is not supported.
Memory Base Address (MBA)
Memory Base Address (MBA): Set by the OS, these bits correspond
to address signals [38:29].
512 MB Address Mask (ADMSK512)
This Bit is either part of the Memory Base Address (RW) or part of
the Address Mask (RO), depending on the value of MSAC[2:1].
See MSAC (Device 2 Function 0, offset 62h) for details.
256 MB Address Mask (ADMSK256)
This bit is either part of the Memory Base Address (R/W) or part of
the Address Mask (RO), depending on the value of MSAC[2:1]. See
MSAC (Device 2 Function 0, offset 62h) for details.
Address Mask (ADM)
Hardwired to 0s to indicate at least 128 MB address range.
Prefetchable Memory (PREFMEM)
Hardwired to 1 to enable prefetching.
Memory Type (MEMTYP)
00 = 32-bit address.
10 = 64-bit address
Memory/IO Space (MIOS)
Hardwired to 0 to indicate memory space.
135

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