Sid2-Subsystem Identification Register; Romadr-Video Bios Rom Base Address Register; Intrpin-Interrupt Pin Register - Intel 2ND GENERATION CORE PROCESSOR FAMILY DESKTOP - DATASHEET VOLUME 2 01-2011 Datasheet

Processor Configuration Registers
2.8.14 SID2—Subsystem Identification Register
This register is used to uniquely identify the subsystem where the PCI device resides.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
Size:
Bit
15:0
2.8.15 ROMADR—Video BIOS ROM Base Address Register
The IGD does not use a separate BIOS ROM; therefore, this register is hardwired to 0s.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
Size:
BIOS Optimal Default
Bit
31:18
17:11
10:1
0
2.8.16 INTRPIN—Interrupt Pin Register
This register indicates which interrupt pin the device uses. The Integrated Graphics
Device uses INTA#.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
Size:
Bit
7:0
Datasheet, Volume 2
0/2/0/PCI
2E–2Fh
0000h
RW-O
16 bits
Reset RST/
Attr
Value PWR
RW-O 0000h Uncore
0/2/0/PCI
30–33h
00000000h
RO
32 bits
000h
Reset RST/
Attr
Value PWR
RO 0000h Uncore
RO 00h Uncore
RO 0h
RO 0b Uncore
0/2/0/PCI
3Dh
01h
RO
8 bits
Reset RST/
Attr
Value PWR
RO 01h Uncore
Description
Subsystem Identification (SUBID)
This value is used to identify a particular subsystem. This field
should be programmed by BIOS during boot-up. Once written, this
register becomes Read Only. This register can only be cleared by a
Reset.
Description
ROM Base Address (RBA)
Hardwired to 0s.
Address Mask (ADMSK)
Hardwired to 0s to indicate 256 KB address range.
Reserved
ROM BIOS Enable (RBE)
0 = ROM not accessible.
Description
Interrupt Pin (INTPIN)
As a single function device, the IGD specifies INTA# as its interrupt
pin.
01h =INTA#.
137