Remapbase-Remap Base Address Register; Remaplimit-Remap Limit Address Register - Intel 2ND GENERATION CORE PROCESSOR FAMILY DESKTOP - DATASHEET VOLUME 2 01-2011 Datasheet

2.5.24 REMAPBASE—Remap Base Address Register
B/D/F/Type:
Address Offset:
Reset Value:
Access:
Size:
BIOS Optimal Default
Bit
63:36
35:20
19:1
0
2.5.25 REMAPLIMIT—Remap Limit Address Register
B/D/F/Type:
Address Offset:
Reset Value:
Access:
Size:
BIOS Optimal Default
Bit
63:36
35:20
19:1
0
74
0/0/0/PCI
90–97h
0000000FFFF00000h
RW-KL, RW-L
64 bits
000000000000h
Reset RST/
Attr
Value PWR
RO 0h
RW-L FFFFh Uncore
RO 0h
RW-KL 0b Uncore
0/0/0/PCI
98–9Fh
0000000000000000h
RW-KL, RW-L
64 bits
000000000000h
Reset RST/
Attr
Value PWR
RO 0h
RW-L 0000h Uncore
RO 0h
RW-KL 0b Uncore
Processor Configuration Registers
Description
Reserved
Remap Base Address (REMAPBASE)
The value in this register defines the lower boundary of the Remap
window. The Remap window is inclusive of this address. In the
decoder A[19:0] of the Remap Base Address are assumed to be 0s.
Thus, the bottom of the defined memory range will be aligned to a
1 MB boundary.
When the value in this register is greater than the value
programmed into the Remap Limit register, the Remap window is
disabled.
These bits are Intel TXT lockable.
Reserved
Lock (LOCK)
This bit will lock all writeable settings in this register, including
itself.
Description
Reserved
Remap Limit Address (REMAPLMT)
The value in this register defines the upper boundary of the Remap
window. The Remap window is inclusive of this address. In the
decoder A[19:0] of the remap limit address are assumed to be Fs.
Thus, the top of the defined range will be one byte less than a
1 MB boundary.
When the value in this register is less than the value programmed
into the Remap Base register, the Remap window is disabled.
These Bits are Intel TXT lockable.
Reserved
Lock (LOCK)
This bit will lock all writeable settings in this register, including
itself.
Datasheet, Volume 2