Msac-Multi Size Aperture Control Register - Intel 2ND GENERATION CORE PROCESSOR FAMILY DESKTOP - DATASHEET VOLUME 2 01-2011 Datasheet

Processor Configuration Registers
2.8.19 MSAC—Multi Size Aperture Control Register
This register determines the size of the graphics memory aperture in function 0 and in
the trusted space. Only the system BIOS will write this register based on pre-boot
address allocation efforts; however, the graphics may read this register to determine
the correct aperture size. System BIOS needs to save this value on boot so that it can
reset it correctly during S3 resume.
Note: This register is Intel TXT locked and becomes read only when the trusted environment
is launched.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
Size:
BIOS Optimal Default
Bit
7:3
2
1
0
Datasheet, Volume 2
0/2/0/PCI
62h
02h
RW, RW-K
8 bits
0h
Reset RST/
Attr
Value PWR
RO 0h
RW-K 0b Uncore
RW-K 1b Uncore
RO 0h
Description
Reserved
Untrusted Aperture Size High (LHSASH)
This field is used in conjunction with LHSASL. The description
below is for both fields (LHSASH and LHSASL).
11b = Bits [28:27] of GMADR are RO, allowing 512 MB of GMADR
10b = Illegal Programming
01b = Bit [28] of GMADR is RW but bit [27] of GMADR is RO,
allowing 256 MB of GMADR
00b = Bits [28:27] of GMADR are RW, allowing 128 MB of GMADR
Untrusted Aperture Size Low (LHSASL)
This field is used in conjunction with LHSASH. The description
below is for both fields (LHSASH and LHSASL).
11b = Bits [28:27] of GMADR are RO, allowing 512 MB of GMADR
10b = Illegal Programming
01b = Bit [28] of GMADR is RW but bit [27] of GMADR is RO,
allowing 256 MB of GMADR
00b = Bits [28:27] of GMADR are RW, allowing 128 MB of GMADR
Reserved
139