Processor Configuration Registers
2.6.5
RID1—Revision Identification Register
This register contains the revision number of the processor root port. These bits are
read only and writes to this register have no effect.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
Size:
Bit
7:4
3:0
2.6.6
CC1—Class Code Register
This register identifies the basic function of the device, a more specific sub-class, and a
register- specific programming interface.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
Size:
Bit
23:16
15:8
7:0
Datasheet, Volume 2
0/1/0–2/PCI
8h
00h
RO-FW
8 bits
Reset
RST/
Attr
Value
PWR
RO-FW
0h
Uncore
RO-FW
0h
Uncore
0/1/0–2/PCI
9–Bh
060400h
RO
24 bits
Reset
RST/
Attr
Value
PWR
RO
06h
Uncore
RO
04h
Uncore
RO
00h
Uncore
Description
Revision Identification Number MSB (RID_MSB)
This is an 8-bit value that indicates the revision identification
number for the root port. Refer to the 2nd Generation Intel
Core™ Processor Family Desktop Specification Update for the value
of the RID register.
Revision Identification Number (RID)
This is an 8-bit value that indicates the revision identification
number for the root port. Refer to the 2nd Generation Intel
Core™ Processor Family Desktop Specification Update for the value
of the RID register.
Description
Base Class Code (BCC)
This field indicates the base class code for this device. This code
has the value 06h, indicating a Bridge device.
Sub-Class Code (SUBCC)
This field indicates the sub-class code for this device. The code is
04h indicating a PCI to PCI Bridge.
Programming Interface (PI)
This field indicates the programming interface of this device. This
value does not specify a particular register set layout and provides
no practical use for this device.
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