Lctl2-Link Control 2 Register - Intel 2ND GENERATION CORE PROCESSOR FAMILY DESKTOP - DATASHEET VOLUME 2 01-2011 Datasheet

Processor Configuration Registers
2.12.22 LCTL2—Link Control 2 Register
B/D/F/Type:
Address Offset:
Reset Value:
Access:
Size:
BIOS Optimal Default
Bit
15:13
12
11
10
9:7
Datasheet, Volume 2
0/0/0/DMIBAR
98–99h
0002h
RWS, RWS-V
16 bits
0h
Reset RST/
Attr
Value PWR
RO 0h
Powerg
RWS 0b
ood
Powerg
RWS 0b
ood
Powerg
RWS 0b
ood
Powerg
ood
RWS-V 000b
Description
Reserved
Compliance De-emphasis (ComplianceDeemphasis)
This bit sets the de-emphasis level in Polling. Compliance state if
the entry occurred due to the Enter Compliance bit being 1b.
1 = -3.5 dB
0 = -6 dB
When the Link is operating at 2.5 GT/s, the setting of this bit has
no effect. Components that support only 2.5 GT/s speed are
permitted to hardwire this bit to 0b.
For a Multi-Function device associated with an Upstream Port, the
bit in Function 0 is of type RWS, and only Function 0 controls the
component's Link behavior. In all other Functions of that device,
this bit is RsvdP.
This bit is intended for debug, compliance testing purposes.
System firmware and software is allowed to modify this bit only
during debug or compliance testing.
Compliance SOS (compsos)
When set to 1, the TXTSSM is required to send SKP Ordered Sets
periodically in between the (modified) compliance patterns. For a
Multi-Function device associated with an Upstream Port, the bit in
Function 0 is of type RWS, and only Function 0 controls the
component's Link behavior. In all other Functions of that device,
this bit is RsvdP. Components that support only the 2.5 GT/s speed
are permitted to hardwire this field to 0b.
Enter Modified Compliance (entermodcompliance)
When this bit is set to 1, the device transmits modified compliance
pattern if the TXTSSM enters Polling. Compliance state.
Components that support only the 2.5GT/s speed are permitted to
hardwire this bit to 0b.
Transmit Margin (txmargin)
This field controls the value of the non-deemphasized voltage level
at the Transmitter pins. This field is reset to 000b on entry to the
TXTSSM Polling.Configuration substate
000 = Normal operating range
001 = 800–1200 mV for full swing and 400–700 mV for
half-swing
010 - (n-1) = Values must be monotonic with a non-zero slope.
The value of n must be greater than 3 and less than
7. At least two of these must be below the normal
operating range
n = 200–400 mV for full-swing and 100–200 mV for
half-swing
n -111 = Reserved
Components that support only the 2.5 GT/s speed are permitted to
hardwire this bit to 0b.
When operating in 5 GT/s mode with full swing, the de-emphasis
ratio must be maintained within ±1 dB from the specification
defined operational value (either -3.5 or -6 dB).
201