2.8.5
RID2—Revision Identification Register
This register contains the revision number for Device 2 Functions 0. These bits are read
only and writes to this register have no effect.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
Size:
Bit
7:4
3:0
2.8.6
CC—Class Code Register
This register contains the device programming interface information related to the Sub-
Class Code and Base Class Code definition for the IGD. This register also contains the
Base Class Code and the function sub-class in relation to the Base Class Code.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
Size:
Bit
23:16
15:8
7:0
132
0/2/0/PCI
8h
00h
RO–FW
8 bits
Reset
RST/
Attr
Value
PWR
RO-FW
0h
Uncore
RO-FW
0h
Uncore
0/2/0/PCI
9–Bh
030000h
RO-V, RO
24 bits
Reset
RST/
Attr
Value
PWR
RO-V
03h
Uncore
RO-V
00h
Uncore
RO
00h
Uncore
Processor Configuration Registers
Description
Revision Identification Number MSB (RID_MSB)
Four MSB of RID. Refer to the 2nd Generation Intel
Processor Family Desktop Specification Update for the value of the
RID register.
Revision Identification Number (RID)
Four LSB of RID. Refer to the 2nd Generation Intel
Processor Family Desktop Specification Update for the value of the
RID register.
Description
Base Class Code (BCC)
This is an 8-bit value that indicates the base class code.
When MGGC0[VAMEN] is 0, this code has the value 03h indicating
a Display Controller.
When MGGC0[VAMEN] is 1, this code has the value 04h indicating
a Multimedia Device.
Sub-Class Code (SUBCC)
When MGGC0[VAMEN] is 0 this value will be determined based on
Device 0 GGC register; GMS and IVD fields.
00h = VGA compatible
80h = Non VGA (GMS = "00h" or IVD = "1b")
When MGGC0[VAMEN] is 1, this value is 80h indicating other
multimedia device.
Programming Interface (PI)
When MGGC0[VAMEN] is 0, this value is 00h indicating a Display
Controller.
When MGGC0[VAMEN] is 1, this value is 00h indicating a NOP.
®
Core™
®
Core™
Datasheet, Volume 2
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