Intel 2ND GENERATION CORE PROCESSOR FAMILY DESKTOP - DATASHEET VOLUME 2 01-2011 Datasheet page 6

2.10.8 HDR6-Header Type Register .............................................................. 149
2.10.9 PBUSN6-Primary Bus Number Register................................................ 149
2.10.10 SBUSN6-Secondary Bus Number Register............................................ 150
2.10.11 SUBUSN6-Subordinate Bus Number Register ....................................... 150
2.10.12 IOBASE6-I/O Base Address Register ................................................... 151
2.10.13 IOLIMIT6-I/O Limit Address Register .................................................. 151
2.10.14 SSTS6-Secondary Status Register ...................................................... 152
2.10.15 MBASE6-Memory Base Address Register.............................................. 153
2.10.16 MLIMIT6-Memory Limit Address Register ............................................. 154
2.10.17 PMBASE6-Prefetchable Memory Base Address Register .......................... 155
2.10.18 PMLIMIT6-Prefetchable Memory Limit Address Register ......................... 156
2.10.19 PMBASEU6-Prefetchable Memory Base Address Upper Register............... 157
2.10.20 PMLIMITU6-Prefetchable Memory Limit Address Upper Register .............. 158
2.10.21 CAPPTR6-Capabilities Pointer Register................................................. 158
2.10.22 INTRLINE6-Interrupt Line Register ..................................................... 159
2.10.23 INTRPIN6-Interrupt Pin Register......................................................... 159
2.10.24 BCTRL6-Bridge Control Register ......................................................... 160
2.10.25 PM_CAPID6-Power Management Capabilities Register ........................... 162
2.10.26 PM_CS6-Power Management Control/Status Register ............................ 163
2.10.27 SS_CAPID-Subsystem ID and Vendor ID Capabilities Register ................ 164
2.10.28 SS-Subsystem ID and Subsystem Vendor ID Register ........................... 165
2.10.29 MSI_CAPID-Message Signaled Interrupts Capability ID Register ............. 165
2.10.30 MC-Message Control Register............................................................. 166
2.10.31 MA-Message Address Register............................................................ 167
2.10.32 MD-Message Data Register ................................................................ 167
2.10.33 PEG_CAPL-PCI Express-G Capability List Register ................................. 167
2.10.34 PEG_CAP-PCI Express-G Capabilities Register ...................................... 168
2.10.35 DCAP-Device Capabilities Register ...................................................... 168
2.10.36 DCTL-Device Control Register ............................................................ 169
2.10.37 DSTS-Device Status Register ............................................................. 170
2.10.38 LCTL-Link Control Register ................................................................ 171
2.10.39 LSTS-Link Status Register ................................................................. 173
2.10.40 SLOTCAP-Slot Capabilities Register ..................................................... 174
2.10.41 SLOTCTL-Slot Control Register ........................................................... 176
2.10.42 SLOTSTS-Slot Status Register............................................................ 178
2.10.43 RCTL-Root Control Register ............................................................... 179
2.11 PCI Device 6 Extended Configuration .................................................................. 180
2.11.1 PVCCAP1-Port VC Capability Register 1 ............................................... 180
2.11.2 PVCCAP2-Port VC Capability Register 2 ............................................... 181
2.11.3 PVCCTL-Port VC Control Register........................................................ 181
2.11.4 VC0RCAP-VC0 Resource Capability Register ......................................... 182
2.11.5 VC0RCTL-VC0 Resource Control Register ............................................. 183
2.11.6 VC0RSTS-VC0 Resource Status Register .............................................. 184
2.12 DMIBAR ......................................................................................................... 185
2.12.1 DMIVCECH-DMI Virtual Channel Enhanced Capability Register ................ 186
2.12.2 DMIPVCCAP1-DMI Port VC Capability Register 1 ................................... 187
2.12.3 DMIPVCCAP2-DMI Port VC Capability Register 2 ................................... 187
2.12.4 DMIPVCCTL-DMI Port VC Control Register............................................ 188
2.12.5 DMIVC0RCAP-DMI VC0 Resource Capability Register ............................. 188
2.12.6 DMIVC0RCTL-DMI VC0 Resource Control Register ................................. 189
2.12.7 DMIVC0RSTS-DMI VC0 Resource Status Register.................................. 190
2.12.8 DMIVC1RCAP-DMI VC1 Resource Capability Register ............................. 190
2.12.9 DMIVC1RCTL-DMI VC1 Resource Control Register ................................. 191
2.12.10 DMIVC1RSTS-DMI VC1 Resource Status Register.................................. 192
2.12.11 DMIVCPRCAP-DMI VCp Resource Capability Register ............................. 192
2.12.12 DMIVCPRCTL-DMI VCp Resource Control Register ................................. 193
6 Datasheet, Volume 2