Programmable Interrupt Transition Register (Pitr) - Motorola DigitalDNA ColdFire MCF5272 User Manual

31
Field INT1
Reset
R/W
23
Field UART1
Reset
R/W
15
Field USB4
Reset
R/W
7
Field QSPI
Reset
R/W
Address
Table 7-4 describes ISR fields.
Bits Field
31–4 — 0 Interrupt source is high.
1 Interrupt source is low.
3–0 — Reserved, should be cleared.

7.2.4 Programmable Interrupt Transition Register (PITR)

The programmable interrupt transition register (PITR), Figure 7-7, specifies the triggering
(either high-to-low or low-to-high) on each of the external interrupt inputs.
30 29
INT2 INT3 INT4
22 21
UART2 PLI_P PLI_A
14 13
USB5 USB6 USB7
6 5
INT5 INT6 SWTO
Figure 7-6. Interrupt Source Register (ISR)
Table 7-4. ISR Field Descriptions
Chapter 7. Interrupt Controller
28 27 26
TMR1 TMR2
XXXX_1111
Read only
20 19 18
USB0 USB1
1111_1111
Read only
12 11 10
DMA ERx
1111_1111
Read only
4 3
1XX1_0000
Read only
MBAR+0x030
Description
Interrupt Controller Registers
25 24
TMR3 TMR4
17 16
USB2 USB3
9 8
ETx ENTC
0
—
7-7