Branch Instruction Execution Times - Motorola DigitalDNA ColdFire MCF5272 User Manual

Table 2-15. Miscellaneous Instruction Execution Times (Continued)
Opcode <ea>
1
movem.l <ea>,&list
movem.l &list,<ea>
nop
pea <ea>
pulse
stop #imm
trap #imm
trapf
trapf.w
trapf.l
unlk Ax
wddata.l <ea>
wdebug.l <ea>
1
n is the number of registers moved by the MOVEM opcode.
2
PEA execution times are the same for (d16,PC).
3
PEA execution times are the same for (d8,PC,Xi*SF).
4
The execution time for STOP is the time required until the processor begins sampling continuously for interrupts.

2.7.5 Branch Instruction Execution Times

Table 2-16 shows general branch instruction timing.
Table 2-16. General Branch Instruction Execution Times
Opcode <ea>
Rn
bra —
bsr —
jmp <ea> —
jsr <ea> —
rte —
rts —
Table 2-17 shows timing for Bcc instructions.
Rn (An) (An)+
— 1+n(n/0) —
— 1+n(0/n) —
3(0/0) — —
— 2(0/1) —
1(0/0) — —
— — —
— — —
1(0/0) — —
1(0/0) — —
1(0/0) — —
2(1/0) — —
— 3(1/0) 3(1/0)
— 5(2/0) —
(An) (An)+
— —
— —
3(0/0) —
3(0/1) —
— 10(2/0)
— 5(1/0)
Chapter 2. ColdFire Core
Effective Address
-(An) (d16,An) (d8,An,Xi*SF) (xxx).wl
— 1+n(n/0)
— 1+n(0/n)
— —
2
— 2(0/1)
— —
— —
— —
— —
— —
— —
— —
3(1/0) 3(1/0)
— 5(2/0)
Effective Address
-(An) (d16,An) (d8,An,Xi*SF)
— 2(0/1)
— 3(0/1)
— 3(0/0) 4(0/0)
— 3(0/1) 4(0/1)
— —
— —
Instruction Timing
#<xxx>
— —
— —
— —
3
3(0/1) 2(0/1)
— —
— — 3(0/0)
— — 15(1/2)
— —
— —
— —
— —
4(1/0) 3(1/0)
— —
(xxx).wl #<xxx>
— —
— —
3(0/0)
3(0/1)
— —
— —
—
—
—
—
—
4
—
—
—
—
—
—
—
—
—
—
—
—
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