Debug Support - Motorola DigitalDNA ColdFire MCF5272 User Manual

Integrated microprocessor
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Chapter 5

Debug Support

This chapter describes the Revision A enhanced hardware debug support in the MCF5272.
5.1 Overview
The debug module is shown in Figure 5-1.
Control
BKPT
Figure 5-1. Processor/Debug Module Interface
Debug support is divided into three areas:
• Real-time trace support—The ability to determine the dynamic execution path
through an application is fundamental for debugging. The ColdFire solution
implements an 8-bit parallel output bus that reports processor execution status and
data to an external emulator system. See Section 5.3, "Real-Time Trace Support."
• Background debug mode (BDM)—Provides low-level debugging in the ColdFire
processor complex. In BDM, the processor complex is halted and a variety of
commands can be sent to the processor to access memory and registers. The external
emulator uses a three-pin, serial, full-duplex channel. See Section 5.5, "Background
Debug Mode (BDM)," and Section 5.4, "Programming Model."
• Real-time debug support—BDM requires the processor to be halted, which many
real-time embedded applications cannot do. Debug interrupts let real-time systems
execute a unique service routine that can quickly save the contents of key registers
and variables and return the system to normal operation. External development
systems can access saved data because the hardware supports concurrent operation
of the processor and BDM-initiated commands. See Section 5.6, "Real-Time Debug
Support."
ColdFire CPU Core
Debug Module
Trace Port
Communication Port
PST[3:0], DDATA[3:0]
DSCLK, DSI, DSO
PSTCLK
Chapter 5. Debug Support
High-speed
local bus
5-1

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