Operation - Motorola DigitalDNA ColdFire MCF5272 User Manual

Operation

Table 16-15. UART Module Signals (Continued)
Signal
Request-to- This output can be programmed to be negated or asserted automatically by either the receiver
Send (URT_RTS) or the transmitter. It can control serial data flow when connected to a transmitter's CTS.
Clock (URT_CLK) The UART's external clock source. It can be used in 1x or 16x mode. When both the transmitter
and receiver use the timer as the clock source (UCR = 0xDD), the 16x clock is driven out on
UARTCLK. If either the transmitter or receiver use an external clock (1x or 16x), URT_CLK is an
input.
Figure 16-22 shows a signal configuration for a UART/RS-232 interface.
16.5 Operation
This section describes operation of the clock source generator, transmitter, and receiver.
16.5.1 Transmitter/Receiver Clock Source
CLKIN serves as the basic timing reference for the clock source generator logic, which
consists of a clock generator and a programmable 16+4-bit divider (UDU, UDL, UFPD)
dedicated to the UART. The clock generator cannot produce standard baud rates if CLKIN
is used, so the 16-bit divider should be used.
16.5.1.1 Programmable Divider
As Figure 16-23 shows, the UART transmitter and receiver can use the following clock
sources:
• An external clock signal on the URT_CLK pin that can be divided by 16. When not
divided, URT_CLK provides a synchronous clock mode; when divided by 16, it is
asynchronous.
• CLKIN supplies an asynchronous clock source that is prescaled by 32 and then
divided by the 16-bit value programmed in UDUn and UDLn. See Section 16.3.11,
"UART Divider Upper/Lower Registers (UDUn/UDLn)." The precision of this
clock source can be tuned using the 4-bit value programmed in UFPDn.
16-20
UART
URT_RTS
URT_CTS
URT_TxD
URT_RxD
Figure 16-22. UART/RS-232 Interface
MCF5272 User's Manual
Description
RS-232 Transceiver
DI2
DO2
DI1
DO1