Motorola DigitalDNA ColdFire MCF5272 User Manual page 85

Integrated microprocessor
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4 x vector_number. When the index value is generated, the vector table contents
determine the address of the first instruction of the desired handler. After the fetch
of the first opcode of the handler is initiated, exception processing terminates and
normal instruction processing continues in the handler.
ColdFire processors support a 1024-byte vector table aligned on any 1-Mbyte address
boundary; see Table 2-18. The table contains 256 exception vectors where the first 64 are
defined by Motorola; the remaining 192 are user-defined interrupt vectors.
Vector Numbers
Vector Offset (Hex)
0
1
2
3
4
5
6–7
8
9
10
11
12
13
14
15
16–23
24
25–31
32–47
48–60
61
62–63
64–255
1
The term 'fault' refers to the PC of the instruction that caused the exception. The term 'next' refers to the PC
of the instruction that immediately follows the instruction that caused the fault.
ColdFire processors inhibit sampling for interrupts during the first instruction of all
exception handlers. This allows any handler to effectively disable interrupts, if necessary,
by raising the interrupt mask level contained in the status register.
Table 2-18. Exception Vector Assignments
Stacked Program Counter
000
004
008
00C
010
014
018–01C
020
024
028
02C
030
034
038
03C
040–05C
060
064–07C
080–0BC
0C0–0F0
0F4
0F8–0FC
100–3FC
Chapter 2. ColdFire Core
Exception Processing Overview
1
Initial stack pointer
Initial program counter
Fault
Access error
Fault
Address error
Fault
Illegal instruction
Fault
Divide by zero
Reserved
Fault
Privilege violation
Next
Trace
Fault
Unimplemented line-a opcode
Fault
Unimplemented line-f opcode
Next
Debug interrupt
Reserved
Fault
Format error
Next
Uninitialized interrupt
Reserved
Next
Spurious interrupt
Next
Level 1–7 autovectored interrupts
Next
Trap #0–15 instructions
Reserved
Fault
Unsupported instruction
Reserved
Next
User-defined interrupts
Assignment
2-37

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