Motorola DigitalDNA ColdFire MCF5272 User Manual page 384

Integrated microprocessor
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Operation
If the clear-to-send operation is enabled, CTS must be asserted for the character to be
transmitted. If CTS is negated in the middle of a transmission, the character in the shift
register is sent and TxD remains in mark state until CTS is reasserted. If the transmitter is
forced to send a continuous low condition by issuing a
transmitter ignores the state of CTS.
If the transmitter is programmed to automatically negate RTS when a message transmission
completes, RTS must be asserted manually before a message is sent. In applications in
which the transmitter is disabled after transmission is complete and RTS is appropriately
programmed, RTS is negated one bit time after the character in the shift register is
completely transmitted. The transmitter must be manually reenabled by reasserting RTS
before the next message is to be sent.
The transmitter must be enabled prior to accepting a
transmitter is disabled while the BREAK is active, the BREAK is not terminated. The
BREAK can only be terminated by using the
Figure 16-25 shows the functional timing information for the transmitter.
TxD
Transmitter
Enabled
USRn[TxRDY]
internal
W
module
select
C1
3
CTS
Manually asserted
4
RTS
by
1
Cn = transmit characters
2
W = write
3
UMR2n[TxCTS] = 1
4
UMR2n[TxRTS] = 1
16-24
C1 in transmission
1
C1
C2
2
W
1
C2
-
command
BIT
SET
Figure 16-25. Transmitter Timing
MCF5272 User's Manual
START BREAK
START BREAK
command.
STOP BREAK
C3
Break
W
W
W
C3
Start
C4 Stop
break
command, the
command. If the
C4
W
W
C5
break
not
transmitted
Manually
asserted
C6
W
C6

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