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31
30
29
Field
PACNT15
PACNT14
Reset
R/W
15
14
13
Field
PACNT7
PACNT6
Reset
R/W
Addr
Table 17-3 describes PACNT fields. Table 17-4 provides the same information organized
by function.
Bits
Name
31–30
PACNT15
29–28
PACNT14
27–26
PACNT13
25–24
PACNT12
23–22
PACNT11
21–20
PACNT10
19–18
PACNT9
28
27
26
25
PACNT13
PACNT12
0000_0000_0000_0000
12
11
10
9
PACNT5
PACNT4
0000_0000_0000_0000
Figure 17-1. Port A Control Register (PACNT)
Table 17-3. PACNT Field Descriptions
Configure pin M3. If this pin is programmed to function as INT6, it is not available as a
GPIO.
00 PA15
01 DGNT1
1x Reserved
Configure pin M2
00 PA14
01 DREQ1
1x Reserved
Configure pin L3
00 PA13
01 DFSC3
1x Reserved
Configure pin L2
00 PA12
01 DFSC2
1x Reserved
Configure pin L1
00 PA11
01 Reserved
10 QSPI_CS1
11 Reserved
Configure pin K5
00 PA10
01 DREQ0
1x Reserved
Configure pin J3
00 PA9
01 DGNT0
1x Reserved
Chapter 17. General Purpose I/O Module
24
23
22
21
PACNT11
PACNT10
Read/Write
8
7
6
5
PACNT3
PACNT2
Read/Write
MBAR + 0x0080
Description
Port Control Registers
20
19
18
17
PACNT9
PACNT8
4
3
2
1
PACNT1
PACNT0
16
0
17-3
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