Uart Mode Register 2 (Umr2N) - Motorola DigitalDNA ColdFire MCF5272 User Manual

Integrated microprocessor
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Register Descriptions
Table 16-2. UMR1n Field Descriptions (Continued)
Bits
Name
2
PT
Parity type. PM and PT together select parity type (PM = 0x) or determine whether a data or address
character is transmitted (PM = 11).
1–0
B/C
Bits per character. Select the number of data bits per character to be sent. The values shown do not
include start, parity, or stop bits.
00 5 bits
01 6 bits
10 7 bits
11 8 bits

16.3.2 UART Mode Register 2 (UMR2n)

UART mode registers 2 (UMR2n) control UART module configuration. UMR2n can be
read or written when the mode register pointer points to it, which occurs after any access to
UMR1n. UMR2n accesses do not update the pointer.
7
Field
CM
Reset
R/W
Address
MBAR + 0x100, 0x140. After UMR1n is read or written, the pointer points to UMR2n.
Table 16-3 describes UMR2n fields.
16-6
PM
Parity Mode
00
With parity
01
Force parity
10
No parity
11
Multidrop mode
6
5
TxRTS
Figure 16-3. UART Mode Register 2 (UMR2n)
MCF5272 User's Manual
Description
Parity Type (PT= 0)
Even parity
Low parity
Data character
4
3
TxCTS
0000_0000
R/W
Parity Type (PT= 1)
Odd parity
High parity
n/a
Address character
SB
0

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