Sram Initialization - Motorola DigitalDNA ColdFire MCF5272 User Manual

SRAM Overview
Table 4-2. RAMBAR Field Description (Continued)
Bits Name
5–1 C/I, Address space masks (ASn). These fields allow certain types of accesses to be masked, or
SC, inhibited from accessing the SRAM module. These bits are useful for power management as
SD, described in Section 4.3.2.3, "Programming RAMBAR for Power Management." In particular, C/I is
UC, typically set.
UD The address space mask bits are follows:
C/I = CPU space/interrupt acknowledge cycle mask. Note that C/I must be set if BA = 0.
SC = Supervisor code address space mask
SD = Supervisor data address space mask
UC = User code address space mask
UD = User data address space mask
For each ASn bit:
0 An access to the SRAM module can occur for this address space
1 Disable this address space from the SRAM module. References to this address space cannot
access the SRAM module and are processed like other non-SRAM references.
0 V Valid. Enables/disables the SRAM module. V is cleared at reset.
0 RAMBAR contents are not valid.
1 RAMBAR contents are valid.
The mapping of a given access into the SRAM uses the following algorithm to determine
if the access hits in the memory:
if (RAMBAR[0] = 1)
if (requested address[31:12] = RAMBAR[31:12])
if (address space mask of the requested type = 0)

4.3.2.2 SRAM Initialization

After a hardware reset, the contents of the SRAM module are undefined. The valid bit of
RAMBAR is cleared, disabling the module. If the SRAM needs to be initialized with
instructions or data, the following steps should be performed:
1. Load RAMBAR, mapping the SRAM module to the desired location.
2. Read the source data and write it to the SRAM. Various instructions support this
function, including memory-to-memory MOVE instructions and the MOVEM
opcode. The MOVEM instruction is optimized to generate line-sized burst fetches
on 0-modulo-16 addresses, so this opcode generally provides the best performance.
3. After data is loaded into the SRAM, it may be appropriate to load a revised value
into RAMBAR with new write-protect and address space mask attributes. These
attributes consist of the write-protect and address-space mask fields.
The ColdFire processor or an external BDM emulator using the debug module can perform
this initialization.
4-4
Description
Access is mapped to the SRAM module
if (access = read)
Read the SRAM and return the data
if (access = write)
if (RAMBAR[8] = 0)
Write the data into the SRAM
else Signal a write-protect access error
MCF5272 User's Manual