Table of Contents
Advertisement
Table 17-7. PDCNT Field Descriptions (Continued)
Bits
Name
9–8
PDCNT4
7–6
PDCNT3
5–4
PDCNT2
3–2
PDCNT1
1–0
PDCNT0
Table 17-8 provides the same information as Table 17-7 but organized by function instead
of register field.
Table 17-8. Port D Control Register Function Bits
PDCNTxx = 00
PIN Number
(Function 0b00)
J4
K1
K2
K3
K4
P2
P5
K6
8-15
1
URT1_RxD is always internally connected to timer 4, TIN4.
17.3 Data Direction Registers
These registers are used to program GPIO port signals as inputs or outputs. The data
direction bit for any line is ignored unless that line is configured for general purpose I/O in
Configure pin K1.
00 High impedance
01 DOUT0
10 URT1_TxD
11 Reserved
Configure pin K3.
00 High impedance
01 Reserved
10 URT1_RTS
11 INT5
Configure pin K2.
00 High impedance
01 Reserved
10 URT1_CTS
11 QSPI_CS2
Configure pin K1. The signal URT1_RxD is always internally connected to TIN4.
00 High impedance
01 DIN0
10 URT1_RxD/TIN4.
11 Reserved
Configure pin J4.
00 High impedance
01 DCL0
10 URT1_CLK
11 Reserved
PDCNTxx = 01
(Function 0b01)
Pin is high Z
DCL0
Pin is high Z
Pin is high Z
Pin is high Z
Pin is high Z
DOUT0
Pin is high Z
Pin is high Z
PWM_OUT2
Pin is high Z
PWM_OUT3
–
Chapter 17. General Purpose I/O Module
Description (Continued)
PDCNTxx = 10
(Function 0b10)
URT1_CLK
DIN0
URT1_RxD
–
URT1_CTS
–
URT1_RTS
URT1_TxD
–
DIN3
TOUT1
TIN1
–
Data Direction Registers
PDCNTxx = 11
(Function 0b11)
–
1
/TIN4
–
QSPI_CS2
INT5
–
INT4
–
–
–
–
17-9
Advertisement
Table of Contents
