Instruction Set Summary - Motorola DigitalDNA ColdFire MCF5272 User Manual

Integrated microprocessor
Table of Contents

Advertisement

Instruction Set Summary

Instruction
C
Carry
N
Negative
V
Overflow
X
Extend
Z
Zero
2.6.1 Instruction Set Summary
Table 2-7 lists implemented user-mode instructions by opcode.
Instruction
Operand Syntax
ADD
Dy,<ea>x
<ea>y,Dx
ADDA
<ea>y,Ax
ADDI
#<data>,Dx
ADDQ
#<data>,<ea>x
ADDX
Dy,Dx
AND
Dy,<ea>x
<ea>y,Dx
ANDI
#<data>,Dx
ASL
Dy,Dx
#<data>,Dx
ASR
Dy,Dx
#<data>,Dx
Bcc
<label>
BCHG
Dy,<ea>x
#<data>,<ea-1>x
BCLR
Dy,<ea>x
#<data>,<ea-1>x
BRA
<label>
BSET
Dy,<ea>x
#<data>,<ea-1>x
BSR
<label>
BTST
Dy,<ea>x
#<data>,<ea-1>x
CLR
<ea>y,Dx
CMP
<ea>y,Ax
2-26
Table 2-6. Notational Conventions (Continued)
Condition Code Register Bit Names
Table 2-7. User-Mode Instruction Set Summary
Operand Size
.L
.L
.L
.L
.L
.L
.L
.L
.L
.L
.L
.L
.L
.B,.W
.B,.L
.B,.L
.B,.L
.B,.L
.B,.W
.B,.L
.B,.L
.B,.W
.B,.L
.B,.L
.B,.W,.L
.L
MCF5272 User's Manual
Operand Syntax
Operation
Source + destination → destination
Source + destination → destination
Immediate data + destination → destination
Immediate data + destination → destination
Source + destination + X → destination
Source & destination → destination
Immediate data & destination → destination
X/C ← (Dx << Dy) ← 0
X/C ← (Dx << #<data>) ← 0
MSB → (Dx >> Dy) → X/C
MSB → (Dx >> #<data>) → X/C
If condition true, then PC + 2 + d
~(<bit number> of destination) → Z,
Bit of destination
~(<bit number> of destination) → Z;
0 → bit of destination
PC + 2 + d
→ PC
n
~(<bit number> of destination) → Z;
1→ bit of destination
SP – 4 → SP; next sequential PC→ (SP); PC + 2 + d
~(<bit number> of destination) → Z
0 → destination
Destination – source
→ PC
n
→ PC
n

Advertisement

Table of Contents
loading

Table of Contents