Motorola DigitalDNA ColdFire MCF5272 User Manual page 147

Integrated microprocessor
Table of Contents

Advertisement

5.5.3.3.10 Write Control Register (
The operand (longword) data is written to the specified control register. The write alters all
32 register bits.
Command/Result Formats:
15
Command
0x2
0x0
0x0
Result
Figure 5-35.
Command Sequence:
WCREG
EXT WORD
MS ADDR
???
"NOT READY"
Operand Data:
Result Data:
12
11
0x8
0x0
Command/Result Formats
WCREG
EXT WORD
MS ADDR
"NOT READY"
Figure 5-36.
WCREG
This instruction requires two longword operands. The first selects the
register to which the operand data is to be written; the second
contains the data.
Successful write operations return 0xFFFF. Bus errors on the write
cycle are indicated by the setting of bit 16 in the status message and
by a data pattern of 0x0001.
Chapter 5. Debug Support
Background Debug Mode (BDM)
)
WCREG
8
7
0x8
0x0
Rc
D[31:16]
D[15:0]
MS DATA
"NOT READY"
WRITE
WRITE
LS DATA
CONTROL
MEMORY
"NOT READY"
REGISTER
LOCATION
Command Sequence
4
3
0
0x0
0x0
XXX
"NOT READY"
XXX
NEXT CMD
"CMD COMPLETE"
XXX
BERR
NEXT CMD
"NOT READY"
5-35

Advertisement

Table of Contents
loading

Table of Contents