Motorola DigitalDNA ColdFire MCF5272 User Manual page 9

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6.2.1 SIM Register Memory Map............................................................................ 6-3
6.2.2 Module Base Address Register (MBAR) ....................................................... 6-4
6.2.3 System Configuration Register (SCR)............................................................ 6-5
6.2.4 System Protection Register (SPR) .................................................................. 6-6
6.2.5 Power Management Register (PMR).............................................................. 6-7
6.2.6 Activate Low-Power Register (ALPR)......................................................... 6-10
6.2.7 Device Identification Register (DIR)............................................................ 6-11
6.2.8 Software Watchdog Timer............................................................................ 6-12
6.2.8.1 Watchdog Reset Reference Register (WRRR) ......................................... 6-13
6.2.8.2 Watchdog Interrupt Reference Register (WIRR) ..................................... 6-13
6.2.8.3 Watchdog Counter Register (WCR) ......................................................... 6-14
6.2.8.4 Watchdog Event Register (WER)............................................................. 6-14
7.1 Overview............................................................................................................. 7-1
7.2 Interrupt Controller Registers ............................................................................. 7-2
7.2.1 Interrupt Controller Registers ......................................................................... 7-3
7.2.2 Interrupt Control Registers (ICR1-ICR4) ...................................................... 7-4
7.2.2.1 Interrupt Control Register 1 (ICR1) ........................................................... 7-4
7.2.2.2 Interrupt Control Register 2 (ICR2) ........................................................... 7-5
7.2.2.3 Interrupt Control Register 3 (ICR3) ........................................................... 7-5
7.2.2.4 Interrupt Control Register 4 (ICR4) ........................................................... 7-6
7.2.3 Interrupt Source Register (ISR) ...................................................................... 7-6
7.2.4 Programmable Interrupt Transition Register (PITR)...................................... 7-7
7.2.5 Programmable Interrupt Wakeup Register (PIWR)........................................ 7-8
7.2.6 Programmable Interrupt Vector Register (PIVR)........................................... 7-9
8.1 Overview............................................................................................................. 8-1
8.1.1 Features........................................................................................................... 8-1
8.1.2 Chip Select Usage........................................................................................... 8-1
8.1.3 Boot CS0 Operation........................................................................................ 8-2
8.2 Chip Select Registers .......................................................................................... 8-2
8.2.1 Chip Select Base Registers (CSBR0-CSBR7) ............................................... 8-3
8.2.2 Chip Select Option Registers (CSOR0-CSOR7) ........................................... 8-5
CONTENTS
Title
Chapter 7
Interrupt Controller
Chapter 8
Chip Select Module
Contents
Page
Number
ix