Motorola DigitalDNA ColdFire MCF5272 User Manual page 73

Table 2-6. Notational Conventions (Continued)
Instruction
dn Signal displacement value, n bits wide (example: d16 is a 16-bit displacement)
SF Scale factor (x1, x2, x4 for indexed addressing mode, <<1n>> for MAC operations)
+ Arithmetic addition or postincrement indicator
– Arithmetic subtraction or predecrement indicator
x Arithmetic multiplication
/ Arithmetic division
~ Invert; operand is logically complemented
& Logical AND
| Logical OR
^ Logical exclusive OR
<< Shift left (example: D0 << 3 is shift D0 left 3 bits)
>> Shift right (example: D0 >> 3 is shift D0 right 3 bits)
Source operand is moved to destination operand
→
←→ Two operands are exchanged
sign-extended All bits of the upper portion are made equal to the high-order bit of the lower portion
If <condition> Test the condition. If the condition is true, the operations in the then clause are performed. If the
then condition is false and the optional else clause is present, the operations in the else clause are
<operations> performed. If the condition is false and the else clause is omitted, the instruction performs no
else operation. Refer to the Bcc instruction description as an example.
<operations>
{} Optional operation
() Identifies an indirect address
d Displacement value, n-bits wide (example: d
n
Address Calculated effective address (pointer)
Bit Bit selection (example: Bit 3 of D0)
lsb Least significant bit (example: lsb of D0)
LSB Least significant byte
LSW Least significant word
msb Most significant bit
MSB Most significant byte
MSW Most significant word
Operand Syntax
Operations
Subfields and Qualifiers
is a 16-bit displacement)
16
Chapter 2. ColdFire Core
Instruction Set Summary
2-25