Chapter 5 Clock Generator; Functions Of Clock Generator - NEC 78K0R/KE3 User Manual

5.1 Functions of Clock Generator

The clock generator generates the clock to be supplied to the CPU and peripheral hardware.
The following three kinds of system clocks and clock oscillators are selectable.
(1) Main system clock
<1> X1 oscillator
This circuit oscillates a clock of f
Oscillation can be stopped by executing the STOP instruction or setting of MSTOP (bit 7 of the clock
operation status control register (CSC)).
<2> Internal high-speed oscillator
This circuit oscillates a clock of f
operating with this internal high-speed oscillation clock. Oscillation can be stopped by executing the
STOP instruction or setting of HIOSTOP (bit 0 of CSC).
An external main system clock (f
external main system clock input can be disabled by executing the STOP instruction or setting of MSTOP.
As the main system clock, a high-speed system clock (X1 clock or external main system clock) or internal high-
speed oscillation clock can be selected by setting of MCM0 (bit 4 of the system clock control register (CKC)).
(2) Subsystem clock
• XT1 clock oscillator
This circuit oscillates a clock of f
Oscillation can be stopped by setting XTSTOP (bit 6 of CSC).
Remark f : X1 clock oscillation frequency
X
f : Internal high-speed oscillation clock frequency
IH
f : External main system clock frequency
EX
f : Subsystem clock frequency
SUB
(3) Internal low-speed oscillation clock (clock for watchdog timer)
• Internal low-speed oscillator
This circuit oscillates a clock of f
The internal low-speed oscillation clock cannot be used as the CPU clock. The only hardware that operates
with the internal low-speed oscillation clock is the watchdog timer.
Oscillation is stopped when the watchdog timer stops.
Remarks 1. f : Internal low-speed oscillation clock frequency
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2. The watchdog timer stops in the following cases.
• When bit 4 (WDTON) of an option byte (000C0H) = 0
• If the HALT or STOP instruction is executed when bit 4 (WDTON) of an option byte (000C0H) = 1
and bit 0 (WDSTBYON) = 0

CHAPTER 5 CLOCK GENERATOR

= 2 to 20 MHz by connecting a resonator to X1 and X2.
X
= 8 MHz (TYP.). After a reset release, the CPU always starts
IH
= 2 to 20 MHz) can also be supplied from the EXCLK/X2/P122 pin. An
EX
= 32.768 kHz by connecting a 32.768 kHz resonator to XT1 and XT2.
SUB
= 240 kHz (TYP.).
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