Chapter 4 Clock Generator; Functions; Configuration - NEC mPD784225 Series User Manual

4.1 Functions

The clock generator generates the clock to be supplied to the CPU and peripheral hardware. The following two
types of system clock oscillators are available.
(1) Main system clock oscillator
This circuit oscillates at frequencies of 2 to 12.5 kHz. Oscillation can be stopped by setting the standby control
register (STBC) to STOP mode (bit 1 (STP) = 1, bit 0 (HLT) = 0) or to stop main system clock (bit 2 of STBC
(MCK) = 1) after switching to the subsystem clock.
(2) Subsystem clock oscillator
This circuit oscillates at the frequency of 32.768 kHz. Oscillation cannot be stopped. If the subsystem clock
oscillator is not used, not using the internal feedback resistance can be set by STBC. This enables the power
consumption to be decreased in the STOP mode.

4.2 Configuration

The clock generator includes the following hardware.
Item
Control registers
Oscillators

CHAPTER 4 CLOCK GENERATOR

Table 4-1. Clock Generator Configuration
Standby control register (STBC)
Oscillation mode selection register (CC)
Clock status register (PCS)
Oscillation stabilization time specification register (OSTS)
Main system clock oscillator
Subsystem clock oscillator
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Configuration
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