Dma Byte Count Registers 0 To 3 (Dbc0 To Dbc3) - NEC V850E/MS1 UPD703100 User Manual

6.3.3 DMA byte count registers 0 to 3 (DBC0 to DBC3)

These 16-bit registers are used to set the byte transfer counts for DMA channel n (n = 0 to 3).
They store the remaining transfer counts during DMA transfer.
These registers are decremented by 1 for byte transfer and by two for 16-bit transfer. Transfer ends when a
borrow occurs. Thus, "transfer count –1" should be set for byte transfer and "(transfer count –1) × 2" for 16-bit
transfer.
These registers can be read/written in 16-bit units.
15 14 13 12
BC BC BC BC
DBC0
15 14 13 12
BC BC BC BC
DBC1
15 14 13 12
BC BC BC BC
DBC2
15 14 13 12
BC BC BC BC
DBC3
15 14 13 12
Bit Position Bit Name
15 to 0 BC15 to
BC0
Remark n = 0 to 3
CHAPTER 6 DMA FUNCTIONS (DMA CONTROLLER)
11 10 9 8 7 6
BC BC BC BC BC BC
11 10 9 8 7 6
BC BC BC BC BC BC
11 10 9 8 7 6
BC BC BC BC BC BC
11 10 9 8 7 6
BC BC BC BC BC BC
11 10 9 8 7 6
Byte Count
Sets the byte transfer count. During DMA transfer, it stores the remaining byte transfer
count.
DBCn
0000H Byte transfer count 1 or the remaining byte transfer count
0001H Byte transfer count 2 or the remaining byte transfer count
:
FFFFH Byte transfer count 65,536 (2
User's Manual U12688EJ4V0UM00
5 4 3 2 1 0
BC BC BC BC BC BC
5 4 3 2 1 0
BC BC BC BC BC BC
5 4 3 2 1 0
BC BC BC BC BC BC
5 4 3 2 1 0
BC BC BC BC BC BC
5 4 3 2 1 0
Function
States
:
16
) or the remaining byte transfer count
Address After reset
FFFFF1E0H Undefined
FFFFF1E2H Undefined
FFFFF1E4H Undefined
FFFFF1E6H Undefined
167