NXP Semiconductors MPC5644A Reference Manual page 70

1
Name Function
17
DSPI_A_SCK —
DSPI_C_PCS[1] DSPI C peripheral chip select
GPIO[93] GPIO
17
DSPI_A_SIN —
DSPI_C_PCS[2] DSPI C peripheral chip select
GPIO[94] GPIO
17
DSPI_A_SOUT —
DSPI_C_PCS[5] DSPI C peripheral chip select
GPIO[95] GPIO
17
DSPI_A_PCS[0] —
DSPI_D_PCS[2] DSPI D peripheral chip select
GPIO[96] GPIO
17
DSPI_A_PCS[1] —
DSPI_B_PCS[2] DSPI B peripheral chip select
GPIO[97] GPIO
CS[2] —
DSPI_D_SCK SPI clock pin for DSPI module
GPIO[98] GPIO
CS[3] —
DSPI_D_SIN DSPI D data input
GPIO[99] GPIO
17
DSPI_A_PCS[4] —
DSPI_D_SOUT DSPI D data output
GPIO[100] GPIO
17
DSPI_A_PCS[5] —
DSPI_B_PCS[3] DSPI B peripheral chip select
GPIO[101] GPIO
DSPI_B_SCK SPI clock pin for DSPI module
DSPI_C_PCS[1] DSPI C peripheral chip select
GPIO[102] GPIO
DSPI_B_SIN DSPI B data input
DSPI_C_PCS[2] DSPI C peripheral chip select
GPIO[103] GPIO
Table 1. MPC5644A signal properties (continued)
PCR
P
PA I/O Voltage
4
A PCR
Field Type Pad Type
2
G
3
DSPI
— — 93 — VDDEH7
A1 10 O Medium
G 00 I/O
— — 94 — VDDEH7
A1 10 O Medium
G 00 I/O
— — 95 — VDDEH7
A1 10 O Medium
G 00 I/O
— — 96 — VDDEH7
A1 10 O Medium
G 00 I/O
— — 97 — VDDEH7
A1 10 O Medium
G 00 I/O
— — 98 — VDDEH7
A1 10 I/O Medium
G 00 I/O
— — 99 — VDDEH7
A1 10 I Medium
G 00 I/O
— — 100 O VDDEH7
A1 10 I/O Medium
G 00
— — 101 O VDDEH7
A1 10 I/O Medium
G 00
P 01 102 I/O VDDEH6
A1 10 O Medium
G 00 I/O
P 01 103 I VDDEH6
A1 10 O Medium
G 00 I/O
7
Status
5
/
6
After
During Reset 176
Reset
— / Up — / Up
— / Up — / Up
— / Up — / Up
— / Up — / Up
— / Up — / Up
— / Up — / Up 141
— / Up — / Up 142
— / Up — / Up
— / Up — / Up
— / Up — / Up 106
— / Up — / Up 112
Package pin #
208 324
— — C17
— — B17
— — A17
— — D16
— — C16
J15 C15
H13 B15
— — B16
— — A16
J16 K21
G15 H22