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24.5.8.2.7
Multibit shift/rotate operations
These operations shift or rotate AS by 2, 4, 8 or 16 bits. Size of shift/rotate is determined by BS[1:0].
Table 24-67
describes the number of shifted/rotated bits depending on BS[1:0] value.
Table 24-67. Number of shifted/rotated bits for each BS[1:0] value
Shift right is a logical operation (i.e., zeros are inserted on left). Multibit shift and rotate operations
overrides BS size to 8 bits. The shifts and rotate operate on 24 bits, independently of the operation size.
V flag is never updated for multibit shift or rotate operations. Carry flag behavior is described on
Table
24-68. CIN is ignored in these operations, but BINV is effective.
Table 24-68. Carry flag value on multibit shift/rotate operations
ALUOP
11001 (shift left)
11001 (shift left)
11001 (shift left)
11001 (shift left)
11010 (shift right)
11010 (shift right)
11010 (shift right)
11010 (shift right)
11011 (rotate right)
11011 (rotate right)
11011 (rotate right)
11011 (rotate right)
1
CCS/CCSV can disable flag update on multibit shift/rotate, but the specified flag size in CCSV is ignored for the C
flag.
24.5.8.2.8
Absolute value operation
Absolute Value operation is selected by ALUOP field. On this operation, AS is interpreted as a signed
number and its absolute value is the result. V and N flags are updated with the result signal determined by
the operation size. AS bit 23 after size override and sign extension (if any, see
size
override), regardless of A-source register size, is used to check the operand signal and is copied to
Freescale Semiconductor
BS[1:0]
Bits shifted/rotated
0
1
2
3
BS[1:0]
0
1
2
3
0
1
2
3
0
1
2
3
MPC5644A Microcontroller Reference Manual, Rev. 6
Enhanced Time Processing Unit (eTPU2)
2
4
8
16
C flag value
AS[22]
AS[20]
AS[16]
AS[8]
AS[1]
AS[3]
AS[7]
AS[15]
AS[2]
AS[4]
AS[8]
AS[16]
Section 24.5.9.2.8, A-Source
1
923
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