External Signal Description - NXP Semiconductors MPC5644A Reference Manual

Microcontroller
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Frequency-modulated phase locked loop (FMPLL)
17.2.3.1
Bypass mode with crystal reference
In the bypass mode with crystal reference, the FMPLL is completely bypassed and the system clock is
driven from the crystal oscillator. The user must supply a crystal that is within the appropriate frequency
range, the crystal manufacturer recommended external support circuitry, and short signal route from the
MCU to the crystal.
In bypass mode the PLL itself may or may not be running, depending on the state of the CLKCFG[1] bit
of FMPLL_ESYNCR1, but the PLL output is not connected to the system clock. Consequently, frequency
modulation is not available. The predivider is also bypassed.
Bypass mode with crystal reference is the default mode at reset if the PLLREF input is driven high. After
reset, this mode can be entered by programming FMPLL_ESYNCR1[CLKCFG] as shown in
17.2.3.2
Bypass mode with external reference
The bypass mode with external reference functions the same as bypass mode with crystal reference, except
that the system clock is driven by an external clock generator connected to the EXTAL pin, rather than a
crystal oscillator. The input frequency range is the same and frequency modulation is not available.
Bypass mode with external reference is the default mode at reset if the PLLREF input is driven low. After
reset, this mode can be entered by programming FMPLL_ESYNCR1[PLLCFG] as shown in
17.2.3.3
Normal mode with crystal reference
In the normal mode with crystal reference, the FMPLL receives an input clock frequency from the crystal
oscillator and the predivider, and multiplies the frequency to create the FMPLL output clock. The user
must supply a crystal that is within the appropriate frequency range, the crystal manufacturer
recommended external support circuitry, and short signal route from the MCU to the crystal.
In normal mode with crystal reference, the FMPLL can generate a frequency modulated clock or a
non-modulated clock (locked on a single frequency). The modulation rate, modulation depth, output
divider (RFD) and whether the FMPLL is modulating or not can be programmed by writing to the FMPLL
registers.
17.2.3.4
Normal mode with external reference
The normal mode with external reference functions the same as normal mode with crystal reference,
except that the input clock reference to the FMPLL is driven by an external clock generator connected to
the EXTAL pin, rather than a crystal oscillator. The input frequency range is the same and frequency
modulation is available.
17.3

External signal description

Table 17-3
lists external signals used by the FMPLL during normal operation.
562
MPC5644A Microcontroller Reference Manual, Rev. 6
Table
17-2.
Table
17-2.
Freescale Semiconductor

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