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Offset from REACM
base address
(0xC3FC_7000)
0x0100 +
(n*0x10 + 0x8)
0x0100 +
(n*0x10 + 0xC)
0x0160 – 0x02FF
0x0300 – 0x0308
0x030C – 0x037F
0x0380 – 0x0388
0x038C – 0x03FF
0x0400 – 0x045C
0x0460 – 0x05FF
0x0600
0x0604 – 0x067F
0x0680
0x0684 – 0x06BF
0x06C0
0x06C4 – 0x06FF
0x0700 – 0x072C
0x0730 – 0x0FFF
23.3.2
REACM module configuration register (REACM_MCR)
The REACM module configuration register (REACM_MCR) contains the control bits to configure the
general operation of the Reaction Module.
Freescale Semiconductor
Table 23-3. Reaction module memory map (continued)
Register name
REACM Channel n Router Register (REACM_CHRRn) (n = 0–5)
Reserved (n = 0–5)
Reserved
REACM Shared Timer Bank Registers (REACM_STBK)
Reserved
REACM Hold-off Timer Bank Registers (REACM_HOTBK)
Reserved
REACM Threshold Bank Register (REACM_THBK)
Reserved
REACM ADC result maximum limit check register
(REACM_ADCMAX)
Reserved
REACM Modulation Range Pulse Width Register
(REACM_RANGEPWD)
Reserved
REACM Modulation Minimum Pulse Width Register
(REACM_MINPWD)
Reserved
REACM Modulation Control Word Bank Registers
(REACM_MWBK)
Reserved
MPC5644A Microcontroller Reference Manual, Rev. 6
Reaction Module (REACM)
Size in
Location
words
6
on page
23-709
3
on page
23-710
3
on page
23-711
24
on page
23-711
1
on page
23-712
1
on page
23-713
1
on page
23-714
12
on page
23-714
697
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