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24.5.5.4.3
Predefined Channel Modes on Input Signal Processing
When processing an input signal, the predefined channel modes can be classified in the following primary
mode groups:
•
Single Transition, Single Match: em_b_st, sm_st, sm_st_e
•
Single Transition, Double Match: em_nb_st, bm_st, m2_st, m2_o_st
•
Double Transition, Single Match: em_b_dt, sm_dt
•
Double Transition, Double Match: em_nb_dt, bm_dt, m2_dt, m2_o_dt
In single transition modes, TDLA assertion may capture both time bases at once, while in double transition
modes each transition captures its related time base in its related capture register.
Double transition is always ordered, i.e TDLB is enabled by TDLA and generates the service request.
The channel logic supports various input modes with combinations of single/double transition and
single/double match, explained in the following subsections.
Either Match, Blocking, Single Transition (em_b_st)
On an input signal, this mode provides double timeout mechanism on a programmed transition edge with
two timebases. The signal transition blocks both pending matches, indicating that no timeout condition
occurred. The two match recognitions block each other, giving good separation in the entry table as to
which match recognition caused the first timeout condition, and generating only one service request. Either
match performs timebase captures which do not overwrite captures by transitions.
Either Match, Blocking, Double Transition (em_b_dt)
In double transition mode each transition is related to one match recognition. TDLA assertion captures its
related timebase, blocks Match A and enables TDLB. TDLB assertion blocks Match B, captures its related
timebase and generates a service request. Match recognitions block each other, so if there is a match
timeout condition on TDLA, only one match service request is generated. This mode is good for qualifying
two signal transitions by match timeout mechanisms, with one service request. Note that although TDLA
assertion does not block Match B recognition, the value captured in CaptureA by TDLA assertion is not
overwritten by this recognition. The second transition blocks Match B. Either match performs timebase
captures which do not overwrite captures by transitions.
Either Match, Non Blocking, Single Transition (em_nb_st)
On an input signal, this is a double timeout mechanism of independent match recognitions of two different
timebases. The match recognitions do not block each other, such that the microcode can check if one or
two match recognitions occurred before their related signal transition. The signal transition detection (by
IPACA) asserts TDLA, blocks both matches, captures both time bases and generates a transition service
request, indicating that none of the two timeout conditions occurred. Any combination can be easily
resolved by microcode (for example, signal transition after Match A and before Match B, or signal
transition after both Match A and Match B).
Another possible use of this mode is allocating one match recognition for transition timeout and the other
for another non-critical timed task, adding functionality to a single channel. Since the transition detection
Freescale Semiconductor
MPC5644A Microcontroller Reference Manual, Rev. 6
Enhanced Time Processing Unit (eTPU2)
873
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