NXP Semiconductors MPC5644A Reference Manual page 478

System Integration Unit (SIU)
Signal
Primary ETPU_A[26]
ALT1 IRQ[14]
ALT2 DSPI_C_SOUT_LVDS
GPIO GPIO[140]
1
In cases where an I/O function can be either an input or an output, I/O direction is specified using the IBE and OBE
bits. Set IBE = 1 for input or OBE = 1 for output.
2
For I/O functions that change direction dynamically, such as the external data bus, switching between input and
output is handled internally and the IBE and OBE bits are ignored.
3
The eTPU function controlled by this register has an additional dependency on the SIU_ISEL8 register settings.
Please see Section 16.6.22, IMUX Select Register 8
16.6.15.94 Pad Configuration Register 141 (SIU_PCR141)
SIU_BASE+0x15A
0 1
R
0 0
W
Reset
0 0
= Unimplemented or Reserved
1
When configured as IRQ, the OBE bit has no effect. The OBE bit must be set to one for both ETPU_A[27] and
GPIO[141] when configured as outputs.
2
When configured as IRQ, DSPI_C_SOUT_LVDS+, SOUTB or GPO, the IBE bit may be set to one to reflect the pin
state in the corresponding GPDI register. Setting the IBE bit to zero reduces power consumption. The IBE bit must
be set to one for both ETPU_A[27] and GPIO[141] when configured as inputs.
3
The weak pull up/down selection at reset for the ETPU_A[27] pin is determined by the WKPCFG pin.
Signal
Primary ETPU_A[27]
ALT1 IRQ[15]
ALT2 DSPI_C_SOUT_LVDS+
ALT3 DSPI_B_SOUT
GPIO GPIO[141]
1
In cases where an I/O function can be either an input or an output, I/O direction is specified using the IBE and OBE
bits. Set IBE = 1 for input or OBE = 1 for output.
2
For I/O functions that change direction dynamically, such as the external data bus, switching between input and
output is handled internally and the IBE and OBE bits are ignored.
3
The eTPU function controlled by this register has an additional dependency on the SIU_ISEL8 register settings.
Please see Section 16.6.22, IMUX Select Register 8
478
Table 16-129. SIU_PCR140 PA values
Name Module
3
eTPU
SIU
DSPI
SIU
2 3 4 5 6
PA OBE
0 0 0 0 0
Figure 16-127. Pad Configuration Register (SIU_PCR141)
Table 16-130. SIU_PCR141 PA values
Name Module
3
eTPU
SIU
DSPI
DSPI
SIU
MPC5644A Microcontroller Reference Manual, Rev. 6
Description
eTPU channel I/O
External interrupt I
LVDS output O
GPIO I/O
(SIU_ISEL8), for more detail.
7 8 9 10
1 2
IBE 0 0 ODE
0 0 0 0
Description
eTPU channel I/O
External interrupt I
LVDS+ output O
Output O
GPIO I/O
(SIU_ISEL8), for more detail.
1,2
I/O PA value
0b001
0b010
0b100
0b000
11 12 13 14 15
HYS SRC WPE WPS
0 0 0 1 WKP
1,2
I/O PA value
0b0001
0b0010
0b0100
0b1000
0b0000
Freescale Semiconductor
3